1. Field of the Invention
The present invention relates to a circuit analysis device operable to make performance evaluation of LSI at the early stage of development.
2. Description of the Related Art
With the demand of miniaturization and weight saving of a portable terminal and digital equipment, it has been earnestly desired to realize the function of various applications by an LSI. Especially, it is desired to develop a system LSI in which the function of various applications can be realized by a processor and a logical circuit.
One kind of the system LSI is constructed with a single LSI which possesses a processor and a logical circuit in it, and the other kind of system LSI is constructed with an LSI possessing a processor and an LSI possessing a logical circuit.
In the system LSI, a processor that is most suitable to the kind and specifications of the application is used. A processor to be used by the system LSI which realizes the application (in other words, a processor to be installed in the application) is called as a “target processor.”
With the decrease of the operation voltage of the system LSI, the power consumption of the system LSI tends to be occupied more by the power consumption due to signal exchange to external circuits, than by the power consumption due to the operation of internal circuits of the system LSI. This is because even if the operation voltage of the LSI is decreased to a low voltage (2.5V or 1.8V, for example), the operation voltage of a circuit interfacing with the external circuits requires a high voltage (5V or 3.3V, for example).
The external circuits include an external memory which exists in the exterior of the system LSI, a target processor, and others.
In addition, the portable terminal and the digital equipment are demanded to improve the speed of processing as well as to balance the communication load between the target processor and the logical circuit which is included in the system LSI.
In such a situation, a severe, temporal requirement is posed on the product development of electronic equipment such as the portable terminal and the digital equipment. Thus, the system LSI, which is the core of the electronic equipment, is required to be developed in a short time. Along with the complication of a circuit and software, the development man-hour and development period of the system LSI are dramatically increased. For this reason, it is necessary to consider the architecture and specifications of the system LSI at the early stage of development.
If the accuracy of estimation of the power consumption due to the signal exchange between the system LSI and the external memory and the accuracy of estimation of the load of communication between the system LSI and the target processor are poor, it may be necessary to reconsider the specifications of the system LSI and its peripheral circuits, at the last stage of development of the system LSI. In some cases, it may be necessary to re-develop the system LSI from the beginning. Reconsideration of the specifications of the system LSI in the final stage of development is fatal for the electronic equipment in which a severe development period is demanded.
For this reason, in the system LSI development, before starting specific circuit design, high accuracy estimation is required for the power consumption due to signal exchange between the system LSI and the external memory, and the load of communication between the system LSI and the target processor.
In particular fields, such as image compression processing and audio compression processing, the object-coded logical circuit model operable to realize an application may be provided in the course of standardization. In order to decide detailed specifications, it is expected to estimate the power consumption and the communication load at an early stage using the logical circuit model.
In the past, an art has been disclosed, in which an operation analysis of the logical circuit described by the source code is performed using a high-universal instruction set of a processor.
According to the prior art, it is possible to perform the operation analysis of the logical circuit, based on the instruction set of the processor and the source code which describes the construction of the logical circuit.
Moreover, Document 1 (Brooks, et, al.; ISCA, pp. 83-94, 2000) discloses an art which performs the operation analysis of the logical circuit described by the source code, using a virtual processor model comprising the instruction and cache information of a specific target processor.
Conventionally, in the early stage of development, these prior arts were used in order to estimate the power consumption and the communication load.
However, the prior arts possess the following problems.
In the operation analysis using the universal instruction set of a processor, it is impossible to analyze the power consumption due to the signal exchange to the external memory and the load of communication with the processor. This is because the communication frequency and the power consumption due to the communication can not be calculated only by the instruction set of the processor. In addition, since the information of the external memory and the information of the internal memory and cache of the processor are not available, it is impossible to analyze the access frequency at which the logical circuit accesses the internal memory or the cache.
On the other hand, in the operation analysis using the virtual processor model, the analysis of the power consumption and the analysis of the communication load are possible; however, it is necessary to design in advance the virtual processor model of the target processor. Thus, the virtual processor model is difficult to be used at the early stage of development.
In addition, in either art, the source code of the logical circuit is necessary to perform the operation analysis. Therefore, even if the logical circuit model described by the object code becomes available, it is impossible to perform the operation analysis.
Since the analysis is performed on a processor which is installed in a computer used for the analysis (the processor is called as a “real processor” in the following), the analysis is performed by the real processor which is different from the target processor.
It has been demanded to dissolve the difference between the real processor and the target processor and to perform the analysis of the power consumption and the communication load.